1. Field of the Invention
This invention relates to a breakdown preventing circuit for preventing a load from being broken down by a reverse bias when the load is connected to a power source with its positive and negative terminals confused.
2. Description of the Prior Art
In electronic equipments adapted for connection with external power sources or adapted to accommodate therewithin internal power sources such as electric cells or the like, it is desirable to provide a breakdown preventing circuit for preventing the breakdown of the electronic equipment (particularly, the breakdown of semiconductor elements or the like employed in the electronic equipment) when the power source is connected at the opposite polarity to the prescribed polarity for the electronic equipment, and more particularly, for preventing the reverse voltage from being applied to the semiconductor elements forming the electronic equipment when such reverse voltage has been applied to the electronic equipment.
FIG. 1 of the accompanying drawings shows an example of such electronic equipment, in which reference numeral 11 designates a logic tester having a probe 12 for contacting any desired point on a digital device 15 and a sensor circuit 13 comprising TTLICs (Transistor Transistor-Logic Integrated Circuits) for detecting whether the point contacted by the probe is at a level corresponding to logic "0" or at a level corresponding to logic "1", thereafter converting the detection signal into light or sound which provides an alarm. Such logic tester has no power source accommodated therewithin, but it is supplied with power in such a manner that conductive clips 19 and 20, attached to the tester, may be clamped onto lines 17 and 18 through which the voltage of a power source 16 contained within the digital device 15 may be supplied to a digital circuit 14 to be tested.
In such logic tester 11, there may occur a risk of the power introducing clips 19 and 20 being connected to the lines 17 and 18 with the polarities of the two clips confused by mistake, and such wrong connection would result in breakdown of the transistors forming the ICs within the sensor circuit 13.
To avoid such breakdown, a diode 23 may be connected to the line 21, as heretofore usually employed for the wrong connection preventing means with electronic equipments. Such diode 23, as seen in FIG. 1, ensures the source voltage to be properly applied to the sensor circuit 13 when the power source is properly connected to the clips 19 and 20, and it prevents the voltages of wrong polarities from being applied to the sensor circuit 13 whenever the power source 16 is connected at wrong polarities, namely, the clip 19 is connected to the line 18 while the clip 20 is connected to the line 17.
Such use of the diode prevents the breakdown of the semiconductor elements, which would otherwise result from wrong connection, by a very simple arrangement. However, when voltages of proper polarities are applied to the sensor circuit 13 which is a load, the forward voltage drop in the diode 23 will be 0.7V or more if it is a silicon diode, and 0.4V or more even if it is a germanium diode. For example, if a digital device using a TTLIC which interfaces the power source is connected to a logic tester also using a TTLIC which forms the load, the tolerance of a TTLIC for the power source fluctuation is 5 to 10% of the source voltage. More specifically, the tolerance is 5.25 (5.5) V to 4.75 (4.5) V, since the source voltage of a TTLIC is 5V. Therefore, in the case as shown in FIG. 1 wherein the silicon diode 23 is added to prevent the breakdown resulting from a wrong connection, the voltage drop of the diode causes the voltage supplied to the load or the sensor circuit 13 to drop to 4.3V or less and this leads to a disadvantage that no TTLIC can be used in the load 13.
To prevent the breakdown from occurring where the voltage drop is small and a wrong connection is made, use may also be made of such a circuit as shown in FIG. 2. Therein, reference numeral 24 designates a transistor (TOSHIBA product, 2SB434), of which the emitter is connected to a clip 25 which should be connected to the positive terminal of the power source, the collector is connected to a sensor circuit 13 which is a load, and the base is connected through a resistor 26 to the sensor circuit 13 and to a clip 27 which should be connected to the negative terminal of the power source. In FIG. 2, reference numerals similar to those in FIG. 1 designate similar members, and it is to be understood that the circuit of FIG. 2 is applied to the digital device 15 as in FIG. 1.
Operation A, this circuit will now be described. When a forward voltage is applied to the base of the transistor 24 to cause a certain quantity of base current I.sub.B, say, 600 .mu.A, to flow, the transistor 24 conducts to supply the voltage to the load 13. Assuming that a current of 30 mA is applied to the load 13, the voltage drop in the transistor 24 will be the saturated collector-emitter voltage V.sub.CES1 of the transistor 24 as shown in FIG. 5 and this voltage drop will become smaller to some extent, say, about 0.15V, if the transistor is the aforementioned 2SB434 (in most transistors, such saturated voltage is 0.2V or less). However, it is of course preferable that such voltage drop be further smaller. In FIG. 5, the dotted curves are the characteristic curves illustrating the relationship between the collector-emitter voltages of the FIG. 2 transistor 24 (2SB434) with its base current prescribed as 600 .mu.A, 500 .mu.A, 400 .mu.A, 300 .mu.A, 200 .mu.A and 100 .mu.A and the current conducted to the load 13. Nevertheless, should the clips 25 and 27 be reverse-connected to the lines 17 and 18, the transistor 24 whose emitter-base withstanding voltage is aslow as 5V (in most transistors, such withstand voltage is about 4 to about 6V) will breakdown to apply a reverse voltage to the load 13 if the voltage of the power source 16 is higher than the withstanding voltage of the transistor.